In the prior art, while designing an external fan circuit of a thin film transistor (TFT), in order to reduce resistances, a dual-metal design is adopted. Namely, the first metal line and the second metal line are paralleled, so as to reduce the resistances. The first metal line is disposed on a first metal layer within a non-display area, and the second metal is disposed on a second metal layer within a display area, so as to reduce the signal influence which is caused by resistor-capacitor delay distortion.
However, the dual-metal design has a problem: when the first metal line is broken, the unbroken second metal line is used to make conduction. However, this leads resistances of the circuit to be greater. Therefore, vertical light lines and parallel light lines easily appear when a module starts a light, thereby reducing the display quality of a thin film transistor liquid crystal display (TFT LCD).
In summary, for the dual-metal design, one layer is broken and the other is not broken, therefore, the circuit is not completely broken. However, in an array substrate and a liquid crystal test, a problem cannot be detected. When drain discharging to MOD displaying, a lower voltage can be inputted. The difference in resistances under low grayscale and low voltage causes phenomenon of light lines, which affects the display quality.
As a result, it is necessary to provide a new technical solution to solve the problems existing in the conventional technologies, as described above.